The evolution of microelectronics and requirement in data rate for High Performance Computing (HPC), involve large number of computation resources and faster components (e.g. processors, memories) to support the application needs. Adding more execution resources in a chip leads to increase the need for efficient communication media between them and in this context, the introduction of new kinds of interconnects becomes one of the majors challenges for the next MPSoC (Multiprocessor System-on-Chip). Today, the manycore architectures are the standard and they imply impressive gain in the domains of HPC and servers but also in the area of embedded systems. Applications in all these categories are greedy for parallelism and integration progress will allow the increase of numbers of cores on chips. So, this trend will continue but only if solutions can be found to overcome the interconnect bottleneck that now increase the cost of exchange information in term of crosstalk, energy consumption, data rate limitations, useless area and limited flexibility. The challenge is now to provide new communication medium between cores inside chips.

In this context, the aim of the BBC (on-chip wireless Broadcast-Based parallel Computing) project is to evaluate the feasibility of using wireless link between core inside chips and to define new paradigms which could be associated to these radio communications. Using wireless communications easily enables broadcast capabilities for Wireless Networks on Chip (WiNoC) and new management techniques for memories and parallelism. So, these new paradigms will be defined and evaluated during this project. The key elements which will be taken into account, will concern the improvement of power consumption, the estimation of achievable data rates, the flexibility and the reconfigurability, the size reduction and the easiness of parallelism and memory hierarchy management.

Thanks to the use of wireless links associated with CDMA (Code Division Multiple Access) access techniques and new broadcast capabilities, limitations due to interconnect can be largely reduced. So, two complementary originalities of this proposal are:

  • the evaluation of the contribution of millimeter-radio link (around 200 GHz) for the intra-chips  and
  • the definition of new opportunities for parallelism management and concurrent memory accesses.

Furthermore, the objective of this project will be to study how this specific communication medium can be combined with some other possible solutions, such as classical electrical or optical NoCs which could provide interesting characteristics. In particular, optical and wireless communications can provide very attractive solutions but maybe not in the same context. So, this project will provide us the possibility to answer to the question:

"In which cases the RF wireless links are attractive and in which cases the optical links are preferable?”.  

To address this global question, collaborations with other CominLabs projects (“3D optical manycore”) which address optical interconnects are planned to achieve comparisons between the two approaches. But before doing comparisons between different communication technologies, this project will study the different parts of a complete wireless infrastructure. To do that, the project is divided into three main work-packages:

i)         Physical Work-Package (WP) will focus on the channel characterization and  the design of RF-transceiver in sub-millimeter range ( near 200 GHz) with the aim to evaluate the energy needed to transport one bit. (This WP will be done in close collaboration between Lab-STICC/DIM team and the CEA/LETI team);

ii)         The second Work-Package will address the development of new low-power MAC (media access control) technique based on CDMA access. (This WP will be done in close collaboration between Lab-STICC/IAS team and the IRISA/CAIRN team);

iii)        The third Work-Package will concern the definition of new broadcast-based fast cooperation protocol designed for resource sharing (bandwidth, distributed memory, cache coherency) and parallel programming. (This WP will be done in close collaboration between Lab-STICC/MOCS team and the IRISA/CAIRN team).

Of course, a great collaboration between all these three main work-packages is needed, and the consortium presents an added value by gathering many skills in different fields of electronics and computer science, and by consolidating interactions between the different actors and research communities in microwaves, multiple access techniques or computer architectures.

For all tasks, the multidimensional aspect, from the chips to inter-board will be taken into account. Figure 1 illustrates this multidimensional aspect and the different protocols that will be analyzed and developed during the “BBC” project.